1. Field of the Invention
This invention is related to a memory cell, especially to a memory cell with high endurance for multiple program operations.
2. Description of the Prior Art
Non-volatile memory (NVM) is a type of memory that retains information it stores even when no power is supplied to memory blocks thereof.
Due to the wide range of applications for various uses, there is a growing need for a nonvolatile memory to be embedded in the same chip with the main circuit, especially for personal electronic devices having strict requirements for circuit area.
According to the programming times limit, non-volatile memory devices are divided into multi-time programmable (MTP) memory and one-time programmable (OTP) memory. A MTP nonvolatile memory cell of prior art includes one floating gate transistor for retaining data, and one or two select transistors for enabling the floating gate transistor to perform corresponding operations. The floating gate is controlled by two different coupling elements, one for program operations and one for erase operations.
Since the electrons are ejected or injected through the floating gate during the program operations and the erase operations, the floating gate is damaged as the number of operations grows. The defect on the floating gate will deteriorate the memory cell and make it difficult to identify the read current generated by the memory cell.